As techniques of increasing capacity of a pulse width modulation (PWM) semiconductor power conversion device, known techniques include one technique in which the capacity of an individual PWM semiconductor power conversion device is increased and another technique in which the capacity is increased by connecting a plurality of PWM semiconductor power conversion devices in parallel. In the former one, since the capacity of a semiconductor device to be used has an upper limit, the increase in capacity is also limited. On the other hand, in the latter one, since the number of power conversion devices to be connected in parallel can be theoretically limitless, there is a merit that the number of power conversion devices can be increased hardly limitless in a practical range.
However, when PWM semiconductor power conversion devices are connected in parallel without any particular care, a so-called circulation current which is a current flowing among the PWM semiconductor power conversion devices increases because of asynchronism of PWM carrier waves of the PWM semiconductor power conversion devices, and thus a current output to a load decreases. That is, a current capacity utilization rate of the PWM semiconductor power conversion devices decreases. There is further a possibility that an overcurrent protection function will be activated to stop the PWM semiconductor power conversion devices. For addressing this, a technique is known to reduce a circulation current by inserting a reactor in an output line of the PWM semiconductor power conversion devices, which is disadvantageous in the installation area and cost. Accordingly, it is required to synchronize the PWM carrier waves of the PWM semiconductor power conversion devices connected, in parallel.
In consideration of the above-mentioned problem, the inventor of the present invention has proposed a PWM semiconductor power conversion system in which one PWM semiconductor power conversion device is set as a master, other PWM semiconductor power conversion devices are set as slaves, and a PWM carrier wave of the master PWM semiconductor power conversion device is synchronized with PWM carrier waves of the slave PWM semiconductor power conversion devices by transmitting a synchronization signal from the master PWM semiconductor power conversion device to the slave PWM semiconductor power conversion devices (see the following Patent Literature 1).
A parallel operation circuit of an inverter device is known in which a deviation current between an output current of a reference inverter device and output current of other inverter devices operating in parallel is detected, and in which the timing of arc-igniting/extinguishing signals of other inverter devices operating in parallel are advanced or delayed with respect to the arc-igniting/extinguishing signal of the reference inverter device such that the current difference is zero (see Patent Literature 2).